FIG. 1A shows an enlarged cross-sectional view (not to scale) of a semiconductor substrate, e.g., a Silicon substrate 10, having an overlying layer of semiconductor material, e.g., an epitaxially deposited SiGe epilayer or film 12. The SiGe epilayer 12 can be referred to as a buffer layer. A problem that currently exists relates to a presence of threading dislocations (4) within the SiGe buffer layer 12.
FIG. 1B depicts the presence of the threading dislocations that arise from a presence of misfit dislocations that exist at the interface of the substrate surface and a bottom surface of the SiGe epilayer. In this example the substrate 10 is a Si{100} layer and the threading dislocations exist in the SiGe epilayer and extend towards and to the top surface of the SiGe epilayer.
Some problems that are associated with the threading dislocations (4) include the use of thick (e.g., about a few microns or greater) SiGe buffer layer thickness (1); a rough surface (2) due to the presence of a cross hatch pattern that arises as a result of the threading dislocations; only a partial relaxation (3) of the strain (degree of strain relaxation <100%); and a high threading dislocation density. These problems can negatively affect the growth of further layers on the SiGe buffer layer 12 and can adversely impact the quality of semiconductor devices that are subsequently formed.